A low risk, high reward approach to adopting formal methods

April 8th, 2013

James Pascoe – STMicroelectronics R&D Ltd.
April 8, 2013
EE Times

At STMicroelectronics, we recently investigated using formal methods as a complement to the constrained random testing of our ARM based CPU subsystems. Our motivations were to:

  1. Achieve verification closure with appreciably less time and effort than that required by a constrained random approach
  2. Encourage designers to develop formal properties for their blocks. Functional insights can be expressed as PSL or SVA assertions in the RTL. These properties then provide follow-on benefits in the subsequent design stages
  3. Augment or replace legacy in-house flows with mature industry tools. This reduces maintenance overhead and promotes a more robust approach.

To address the engineers’ reservations about formal’s ease of use, we took a stepwise approach that would enable them to accumulate expertise incrementally. This approach also significantly reduced the project’s risk. More …

The Verification Effort

April 4th, 2013


Could it be that 50 percent of your system-on-chip (SOC) verification effort will be in formal verification? Let me begin by answering this question by asking a counter question: Is there a feasible alternative?

Most of the SOC designs today have at least three or four processors. There are other complex high-speed serial buses such as USB OTG (On the Go) and PCIe as well as slower buses like I2C and SPI. There are also audio and video interfaces and numerous memory interfaces. More…

Kathryn Kranen Wins UBM’s Lifetime Achievement Award

April 4th, 2013

April 4, 2013
Jasper Design Automation

UBM Tech, which serves design engineers and the electronics industry with essential business and technical information, today announced Kathryn Kranen, President & CEO of Jasper Design Automation, has been named the Lifetime Achievement award winner for the 2013 ACE Awards, which honor the people and companies behind the technologies and products that are changing the world of electronics. More…



Kathryn Kranen, CEO and President of Jasper Design Automation , Joins CriticalBlue’s Board of Directors

April 4th, 2013

Jasper Design Automation
March 19, 2013 CriticalBlue is pleased to announce that Kathryn Kranen, President and CEO of Jasper Design Automation, has joined its Board of Directors. Kranen brings more than 20 years EDA industry experience and a proven business track record to the CriticalBlue Board. Kranen has been responsible for leading Jasper’s team in successfully bringing the company’s pioneering technology to the design verification market. She is chairman of the EDA Consortium board of directors and is serving her eighth elected term on the EDAC board. More…